This part of IEC 60749 describes a test method used to determine the resistance of a
semiconductor device to thermal and mechanical stresses due to cycling the power
dissipation of the internal semiconductor die and internal connectors. This happens when lowvoltage
operating biases for forward conduction (load currents) are periodically applied and
removed, causing rapid changes of temperature. The power cycling test is intended to
simulate typical applications in power electronics and is complementary to high temperature
operating life (see IEC 60749-23). Exposure to this test may not induce the same failure
mechanisms as exposure to air-to-air temperature cycling, or to rapid change of temperature
using the two-fluid-baths method. This test causes wear-out and is considered destructive.
NOTE It is not the intention of this specification to provide prediction models for lifetime evaluation.
IEC 60749-34:2010 history
2010IEC 60749-34:2010 Semiconductor devices - Mechanical and climatic test methods - Part 34: Power cycling
2005IEC 60749-34:2005 Semiconductor devices - Mechanical and climatic test methods - Part 34: Power cycling
2004IEC 60749-34:2004 Semiconductor devices - Mechanical and climatic test methods - Part 34: Power cycling