DS/EN 61523-2:2002
Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries

Standard No.

DS/EN 61523-2:2002

Release Date

2002

Published By

Danish Standards Foundation

Latest

DS/EN 61523-2:2002

Scope

This standard specifies the pre-layout delay calculation method for CMOS1 ASIC Libraries which contains cell based primitives and memories to be used during the pre-layout design phase of Logic simulation, Timing verification, and Logic synthesis. The delay calculation method addressed in this standard consists of 1) Estimation of wire capacitance and 2) Delay calculation method based on table look-up.

DS/EN 61523-2:2002 history

• 2002 DS/EN 61523-2:2002 Delay and power calculation standards - Part 2: Pre-layout delay calculation specification for CMOS ASIC libraries