SJ 20954-2006
Integrated circuits latch-up test (English Version)
- Standard No.
- SJ 20954-2006
- Language
- Chinese, Available in English version
- Release Date
- 2006
- Published By
- Professional Standard - Electron
- Latest
- SJ 20954-2006
- Scope
- This standard specifies the test methods for current lockout and overvoltage lockout of integrated circuits (ICs). The purpose of this standard is to establish a method for testing IC lock-up tests, which is used to judge the lock-in characteristics of integrated circuits and determine the lock-in failure criteria. Lock-up sensitivity is important in determining product reliability, minimum no-failure (NTF), and electrical over-stress failure (EOS). This test method is applicable to NMOS, CMOS, dual-stage and various products using such processes. When the device is placed under this test method and locking occurs, it indicates that the electrical performance of the device has failed, regardless of the special structure of the device.
SJ 20954-2006 Referenced Document
- GB/T 17574 Semiconductor devices. Integrated circuits. Part 2: Digital integrated circuits
SJ 20954-2006 history
- 2006 SJ 20954-2006 Integrated circuits latch-up test
