IEC 60191-6-5:2001
Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for fine-pitch ball grid array (FBGA)

Standard No.
IEC 60191-6-5:2001
Release Date
2001
Published By
International Electrotechnical Commission (IEC)
Latest
IEC 60191-6-5:2001
Replace
IEC 47D/437/FDIS:2001
Scope
This part of IEC 60191 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array (hereinafter called FBGA), whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square. The demand for area array style packages exists according to the multi-functioning and high performance of electrical equipment. The object of this design guide is to standardize outlines and secure interchangeability of FBGA packages. The terminal pitch and package outlines of these fine-pitch array packages are smaller than those of BGA packages.

IEC 60191-6-5:2001 history

  • 2001 IEC 60191-6-5:2001 Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for fine-pitch ball grid array (FBGA)
Mechanical standardization of semiconductor devices - Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages; Design guide for fine-pitch ball grid array (FBGA)



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