JEDEC JESD82-21-2007
Standard for Definition of CUA845 PLL Clock Driver for Registered DDR2 DIMM Applications

Standard No.
JEDEC JESD82-21-2007
Release Date
2007
Published By
(U.S.) Joint Electron Device Engineering Council Soild State Technology Association
Scope
This standard defines standard specifications of dc interface parameters, switching parameters, and test loading for definition of a CUA845 PLL clock device for registered DDR2 DIMM applications.
Standard for Definition of CUA845 PLL Clock Driver for Registered DDR2 DIMM Applications



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