(U.S.) Joint Electron Device Engineering Council Soild State Technology Association
Status
Scope
This standard (a replacement of JEDEC Standards 8, 8-1, 8-1A, and 8B) defines dc interface parameters
for a family of digital circuits operating from a power supply of nominal 3 V/3.3 V and driving/driven by
parts of the same family. Clause 2 describes normal DC electrical characteristics and clause 2.4 (added
by revision C) describes the optional characteristics for Schmitt trigger operation. The specifications in
this standard represent a minimum set, or ‘base line’ set, of interface specifications for LVTTL
compatible and LVCMOS compatible circuits.