(U.S.) Joint Electron Device Engineering Council Soild State Technology Association
Status
Scope
When integrated circuit packages are subjected to the high-temperature solder reflow operation
associated with the mounting of devices to a printed circuit board, deformation and deviation
from an ideal state of uniform planar flatness, i.e., warpage, often results. The deviation of the
package from planarity during board assembly can cause the package terminals to have open
or short circuit connections after the reflow soldering operation. (Certain package types such as
ball grid arrays (BGAs) have been found to be more susceptible to the effects of component
warpage.) Intrinsic package warpage is largely driven by coefficient of thermal expansion
mismatch between the various packaging material constituents. Package warpage is therefore
temperature dependent and the final warpage state is a function of the entire temperature
history or reflow profile, that is typically nonlinear in time. The presence of moisture can also
introduce hygroscopic strain effects which further contribute to changes in total package body
warpage.